JTAG to AXI4

JTAG to AXI4

There are many possibilities of how you might debug your FPGA design. The most straigtforward way is to use the Chipscope (ILA – Integrated Logic Analyzer), which is accessed by JTAG interface. This is very practical, but it is intended for debug only. What if...
Linux kernel driver development for Zynq/ZynqMP

Linux kernel driver development for Zynq/ZynqMP

I remember that when I first searched for a guide on how to write linux kernel drivers, the first suggestion mentioned was that I should actually avoid writing kernel drivers. I would personally not suggest the same, though the fact remains that writing kernel drivers...
Vivado VersionControl

Vivado VersionControl

Whoever is familiar with Vivado already knows that it generates a huge quantity of files and that understanding a proper version control thus seems to be not as simple. The truth is, that Vivado’s design indeed consist of a plenty of different file types, but...
FPGA LVDS Interfacing

FPGA LVDS Interfacing

Most of newer ADCs and DACs tend to use the JESD204b/c standards simply due to higher performance requirements – the ever growing need for more usable Bandwidth, faster ADCs and DACs with increased resolution per sample and multi-channel implementations. The...